Various digital circuits may respond to transitions of a digital signal from one binary level to another. These digital circuits may respond to a digital input signal by transitioning a digital output signal between two binary levels, which may be the same binary levels as the input signal or some other levels As digital circuits switch from one binary state to another, they may transition through a “metastable state” in which an output signal has not yet reached either level. In many cases, this metastable state is at a voltage that is at the mid-point between voltages corresponding to the two binary levels of the output signal. Although the existence of this metastable state may not pose a problem in many applications, in others it may prevent a digital circuit from properly responding to a digital input signal. For example, if an input signal transitions from a first binary level to a second binary level, and then quickly transitions back to the first binary level, the circuit may never transition through the metastable state. As a result, the output signal will remain at the same binary level.
Another example of a circuit in which metastable states may pose a problem is a latch circuit in which a first digital circuit has its input coupled to the output of a second digital circuit, and the output of the first digital circuit is coupled to the input of the second digital circuit. In such case, there are two stable states in which the output of the latch circuit can remain at either of two binary levels, and a metastable state between these two binary levels. If an input signal transitions from a first level to a second level, the latch should switch states. However, if one of the digital circuits has not transitioned through the metastable state either before the input signal has switched back to the first level or after the input signal is no longer being applied, the latch may not switch state in response to the input signal. Even if the digital circuit has transitioned through the metastable state and thus causes the latch to switch state, it may require an excessive time for the state change of the latch to occur. This slow response speed may be due to the relatively weak drive power of one of the digital circuits when a received input signal is at or close to the metastable state. As a result, the operating speed of digital circuits may be undesirably limited.